*******************************************************************

Call for Papers

The Twenty-First International Conference on
Parallel Architectures and Compilation Techniques
PACT 2012
Minneapolis, Minnesota, USA
September 19-23, 2012
pactconf.org
Sponsored by ACM SIGARCH, IFIP WG 10.3, IEEE TCCA and IEEE TCPP

*******************************************************************

PACT 2012 will bring together researchers from architecture,
compilers, applications and languages to present and discuss
innovative research of common interest. PACT solicits novel papers on
a broad range of topics including, but not limited to:

* Parallel architectures and computational models
* Compilers and tools for parallel computer systems
* Multicore, multithreaded, superscalar, and VLIW architectures
* Compiler/hardware support for hiding memory latencies
* Support for correctness in hardware and software
(especially with concurrency)
* Reconfigurable computing
* Dynamic translation and optimization
* I/O issues in parallel computing and their relation to applications
* Parallel programming languages, algorithms and applications
* Middleware and run time system support for parallel computing
* High performance application specific systems
* Applications and experimental systems studies
* Topics in non-traditional computing systems

Detailed instructions for electronic submission will be posted on the
PACT conference web site. For additional information regarding paper
submissions, please contact the Program Co-chairs.

*** CALL FOR WORKSHOP/TUTORIAL PROPOSAL
We are soliciting proposals for workshops and tutorials to be held
immediately before and after the conference. Interested individuals
may contact the Workshop Chair and the Tutorial Chair.

*** ACM STUDENT RESEARCH COMPETITION
We are calling for participation in the ACM Student Research
Competition (SRC). All eligible participants are entitled to an up to
$500 travel grant. Winners will receive monetary and other prizes.
Please see the PACT web site for details.

*** IMPORTANT DATES
* Abstract submission March 16, 2012
* Paper submission (firm) March 23, 2012
* Workshop/Tutorial Proposals April 2, 2012
* Author notification June 15, 2012
* ACM SRC Abstract submission July 2, 2012

*** Organizing Committee
General Co-chairs
Sangyeun Cho, Univ. of Pittsburgh
Pen-Chung Yew, Univ. of Minnesota
Program Co-chairs
Luiz DeRose, Cray, Inc.
David J. Lilja, Univ. of Minnesota
ACM SRC Chair
Rajeev Balasubramonian, Univ. of Utah
Finance Chair
Xiaorui Wang, Ohio State Univ.
Local Chair
Jon Weissman, Univ. of Minnesota
Publication Chair
Yoonseo Choi, IBM T.J. Watson
Publicity Chairs
Americas Barry Rountree, LLNL
China Xiaobing Feng, ICT
Europe Marcelo Cintra, Univ. of Edinburgh
India Mainak Chaudhuri, IIT Kanpur
Pacific Kei Hiraki, Univ. of Tokyo
Registration Chair
Antonia Zhai, Univ. of Minnesota
Student Chair
Xin Fu, Univ. of Kansas
Submissions Chair
Byeong Kil Lee, Univ. of Texas San Antonio
Tutorial Chair
John Cavazos, Univ. of Delaware
Web Chair
Nikos Hardavellas, Northwestern Univ.
Workshop Chair
Thomas Wenisch, Univ. of Michigan

*** Steering Commitee
Michel Cosnard, INRIA
Kemal Ebcioglu, Global Supercomputing
Jean Luc Gaudiot (Chair), UC Irvine
Michael Gschwind, IBM USA
Jens Knoop, Vienna Univ. Technology
Lawrence Rauchwerger, Texas A&M Univ.
Valentina Salapura, IBM USA
Vivek Sarkar, Rice Univ.
Gabriel Silberman, CA

*** Program Commitee
Tarek Abdelrahman, Univ. of Toronto
Dennis Abts, Google
Nancy Amato, Texas A&M Univ.
Dorian Arnold, Univ. of New Mexico
Brad Beckmann, AMD
John Carter, IBM Research
Daniel Chavarria, PNNL
Derek Chiou, Univ. of Texas Austin
Marcelo Cintra, Univ. of Edinburgh
Tom Conte, Georgia Tech.
Brodis R. de Supinski, LLNL
Lieven Eeckhout, Ghent Univ.
Rudi Eigenmann, Purdue Univ.
Guang Gao, Univ. of Delaware
Michael Garland, NVIDIA
Michael Gerndt, Technical Univ. Munich
Kei Hiraki, Univ. of Tokyo
Amir Hormati, Microsoft Research
Vijay Japana Reddi, Univ. of Texas Austin
Alex Jones, Univ. of Pittsburgh
Karen Karavanic, Portland State Univ.
Jaejin Lee, Seoul National Univ.
Jose Martinez, Cornell Univ.
Sally A. McKee, Chalmers Univ.
Jose Moreira, IBM Research
Satish Narayanasamy, Univ. of Michigan
Kunle Olukotun, Stanford Univ.
Vijay Pai, Purdue Univ.
Shaz Qadeer, Microsoft Research
Martin Schulz, LLNL
Resit Sendag, Univ. of Rhode Island
Mary Lou Soffa, Univ. of Virginia
Michael Taylor, Univ. of California San Diego
Felix Wolf, RWTH Aachen Univ.
Antonia Zhai, Univ. of Minnesota
Xiaodong Zhang, Ohio State Univ.

High Performance Graphics 2012
Call For Participation
Introduction

We are pleased to announce High-Performance Graphics 2012. High Performance Graphics is the leading international forum for performance-oriented graphics systems research including innovative algorithms, efficient implementations, and hardware architecture. The conference brings together researchers, engineers, and architects to discuss the complex interactions of massively parallel hardware, novel programming models, efficient graphics algorithms, and novel applications. High Performance Graphics was founded in 2009 to synthesize and broaden on two important and well-respected conferences in computer graphics: Graphics Hardware and Interactive Ray Tracing.

Conference Info

Co-sponsored by Eurographics and ACM SIGGRAPH (pending)

The program features three days of paper and industry presentations, with ample time for discussions during breaks, lunches, and the conference banquet.

The conference, which will take place on June 25-27, is co-located with the Eurographics Symposium on Rendering in Paris, France.

The conference website is located at http://www.highperformancegraphics.org/

Papers Track

We invite original and innovative performance-oriented contributions from all areas of graphics, including hardware architectures, rendering, physics, animation, simulation, and data structures, with topics including (but not limited to): Interactive rendering pipelines (hardware or software)
Shading architectures
Spatial acceleration data structures
Surface representations and tessellation algorithms
Reconfigurable rendering pipelines
Texturing and compression/decompression algorithms
Interactive rendering algorithms (hardware or software)
Visibility algorithms (ray tracing, rasterization, transparency, anti-aliasing, …)
Illumination algorithms (shadows, global illumination, …)
Image sampling strategies and filtering techniques
Graphics hardware and systems
Novel fixed-function hardware design
Graphics hardware simulation, optimization, and performance measurement
Novel display technologies
Languages and compilation
Programming models and APIs for graphics
Shading language design and implementation
Compiling for massively parallel graphics architectures
Parallel computing for graphics
Scalable algorithms for parallel rendering and large data visualization
Physics and animation
Computer vision
GPU computing
Mobile graphics
Hardware design for mobile, embedded, integrated, and low-power devices
Algorithms, rendering engines, and applications for mobile graphics
Innovative visual computing applications for mobile devices

Papers Length and Format

There is no fixed maximum length for a paper. However, the magnitude of the contribution must be proportional to the length of the paper. Papers longer than ten typeset pages in the final format must make a very significant contribution to be accepted. Papers of four or fewer pages will be held to a less strict standard of citation and description of related work (comparison to the strongest alternative techniques is still important, but an exhaustive review is not necessary). All accepted papers are treated equally, i.e., included in the electronic proceedings and presented at the conference. At least one paper author must attend the conference to present an accepted paper. The papers will be archived in the ACM and Eurographics Digital Libraries. Paper Submission Info

Authors are invited to upload papers electronically in Adobe PDF format by visiting the submissions area on http://www.highperformancegraphics.org/. We encourage anonymous submissions (in which the paper contains no identifying information) if possible. Video sequences in QuickTime, MPEG, or AVI format may be submitted using the electronic submission system. Dual submission is not allowed; any paper submitted to another venue and under consideration during the HPG review cycle will be rejected. Papers and short papers should be formatted according to the Eurographics Computer Graphics Forum publication guidelines: http://www.eg.org/EG/Publications/guidelines; we recommend using the templates given there. For further information please contact: papers@highperformancegraphics.org

Hot 3D Systems Track

We invite vendors in the graphics industry to present their latest and greatest 3D chips, high-performance software, and system designs.

Presentations should be 20 minutes long, technical rather than marketing-oriented, and with a focus on real products. Hot 3D presentations are not considered archival publications for the purposes of future submission to peer-reviewed venues.

The deadline for Hot 3D applications is Monday, May 7.

For further information please contact: hot3d@highperformancegraphics.org

Posters

We also invite the submission of posters describing on-going or late-breaking work. In addition to traditional posters, this session will be enhanced to provide opportunities for paper authors to present implementation details or hands-on demonstrations.

The deadline for poster submissions is Monday, May 7. Notification of acceptance is Monday, May 14.

To submit a poster, please:

Prepare an extended abstract (one page maximum) that summarizes the work using the paper format described above.
Prepare a high-quality version of the final poster.
Send both items (in PDF format) to posters@highperformancegraphics.org

Additional information:

Posters will be exhibited in the break areas throughout the conference. For each poster, we will attempt to make space available for interactive demonstrations (if necessary and only upon request).
Poster authors will be responsible for printing the poster, bringing it to the conference, and putting it up. Easels will be provided.

For further information please contact: posters@highperformancegraphics.org

Important Dates

All deadlines are at 11:59 PM GMT-7.

Papers:

Tuesday, April 3
Deadline for paper abstract submissions (strongly encouraged)

Friday, April 6
Deadline for paper submissions

Monday, May 14
Notification of paper acceptance

Tuesday, May 22
Revised papers due

Hot 3D & Posters:

Monday, May 7
Deadline for poster and Hot3D submissions

Monday, May 14
Notification of poster and Hot3D acceptance

General:

Monday-Wednesday, June 25-27

Conference

Best Paper Award

An award of $500 will be given to the authors of the most outstanding paper presented at the event. The award is based on the accuracy, originality, and importance of the technical concept, the quality and readability of the manuscript, as well as the content and delivery of the verbal presentation. To qualify for this award, one or more of the authors must attend the conference and present the paper. The winner will be chosen by the organizing committee based on audience feedback and will be announced at the end of the conference.

Demonstrations

Presenters and participants are invited to bring prototypes and products for demonstration at the event. Demonstrations will be held during breaks and before and after the sessions. We highly encourage paper authors and industry presenters to demonstrate their systems. Please contact the organizing committee by email at general@highperformancegraphics.org to arrange for space or electrical connections that may be required for your demonstration.

Organization

General Chairs:
Michael Doggett (Lund University) David McAllister (NVIDIA)

Program Chairs:
Warren Hunt (Intel) Jens Krüger (IVDA Saarland University)

Papers Chairs:
Carsten Dachsbacher (Karlsruhe Institute of Technology, Germany)
Jacob Munkberg (Intel) Jacopo Pantaleoni (NVIDIA)

Poster Chairs:
Manfred Ernst (Intel) Justin Hensley (AMD)

Local Arrangements Chair:
Elmar Eisemann (Telecom ParisTech) Tamy Boubekeur (Telecom ParisTech)

Publicity Chair:
Josh Steinhurst (Bucknell University, USA)

Treasurer:
Anselmo Lastra (University of North Carolina, USA)
Steve Molnar (NVIDIA, USA)

**** CALL FOR PAPERS ****

The 21st International ACM Symposium on
High-Performance Parallel and Distributed Computing
(HPDC'12)

Delft University of Technology, Delft, the Netherlands

June 18-22, 2012

http://www.hpdc.org/2012

The ACM International Symposium on High-Performance Parallel and Distributed Computing (HPDC)
is the premier annual conference on the design, the implementation, the evaluation, and
the use of parallel and distributed systems for high-end computing. HPDC'12 will take place
in Delft, the Netherlands, a historical, picturesque city that is less than one hour away
from Amsterdam-Schiphol airport. The conference will be held on June 20-22 (Wednesday to
Friday), with affiliated workshops taking place on June 18-19 (Monday and Tuesday).

**** SUBMISSION DEADLINES ****
Abstracts: 16 January 2012
Papers: 23 January 2012 (No extensions!)

**** HPDC'12 GENERAL CHAIR ****
Dick Epema, Delft University of Technology, Delft, the Netherlands

**** HPDC'12 PROGRAM CO-CHAIRS ****
Thilo Kielmann, Vrije Universiteit, Amsterdam, the Netherlands
Matei Ripeanu, The University of British Columbia, Vancouver, Canada

**** HPDC'12 WORKSHOPS CHAIR ****
Alexandru Iosup, Delft University of Technology, Delft, the Netherlands

**** SCOPE AND TOPICS ****
Submissions are welcomed on all forms of high-performance parallel and distributed computing,
including but not limited to clusters, clouds, grids, utility computing, data-intensive
computing, and massively multicore systems. Submissions that explore solutions to estimate
and reduce the energy footprint of such systems are particularly encouraged. All papers
will be evaluated for their originality, potential impact, correctness, quality of
presentation, appropriate presentation of related work, and relevance to the conference,
with a strong preference for rigorous results obtained in operational parallel and
distributed systems.

The topics of interest of the conference include, but are not limited to, the following,
in the context of high-performance parallel and distributed computing:

- Systems, networks, and architectures for high-end computing
- Massively multicore systems
- Virtualization of machines, networks, and storage
- Programming languages and environments
- I/O, storage systems, and data management
- Resource management, energy and cost minimizations
- Performance modeling and analysis
- Fault tolerance, reliability, and availability
- Data-intensive computing
- Applications of parallel and distributed computing

**** PAPER SUBMISSION GUIDELINES ****
Authors are invited to submit technical papers of at most 12 pages in PDF format, including
figures and references. Papers should be formatted in the ACM Proceedings Style and
submitted via the conference web site. No changes to the margins, spacing, or font sizes as
specified by the style file are allowed. Accepted papers will appear in the conference
proceedings, and will be incorporated into the ACM Digital Library. A limited number of
papers will be accepted as posters.

Papers must be self-contained and provide the technical substance required for the program
committee to evaluate their contributions. Submitted papers must be original work that has
not appeared in and is not under consideration for another conference or a journal. See the
ACM Prior Publication Policy for more details.

**** IMPORTANT DATES ****
Abstracts Due: 16 January 2012
Papers Due: 23 January 2012 (No extensions!)
Reviews Released to Authors: 8 March 2012
Author Rebuttals Due: 12 March 2012
Author Notifications: 19 March 2012
Final Papers Due: 16 April 2012
Conference Dates: 18-22 June 2012

http://www.computer.org/portal/web/computingnow/cocfp8

Special Issue on Massively Threaded Computer Systems

Final submissions due: 15 February 2012 Publication date: August 2012

Computer seeks submissions for an August 2012 special issue on massively threaded computer systems.

Massively threaded architectures, such as the Cray XMT, have long been known as efficient solutions for high-throughput computing on large datasets. With the broad availability of GPUs and their transformation to more general compute resources, this type of architecture has moved beyond its previous niche and is becoming mainstream. Several factors are driving this significant change, including the end of uniprocessor performance scaling, the dominance of power as a design constraint, tepid progress in reducing memory latency, and the increasing availability of large datasets from both Internet-scale data collection and high-definition media content.

This special issue seeks to highlight the state of the art and future directions for massively threaded systems, defined as systems that support hundreds or thousands of hardware threads per device. Contributions should focus on the specific challenges that come from massive threading as well as how threading helps address the looming challenges of chip and system-level parallel computing. Potential topics of interest for this special issue include

applications and algorithms that effectively exploit massively threaded systems;
programming models, programming languages, and runtime or operating systems designed to support massively threaded execution;
chip or system architectures for massive threading;
embedded or special-purpose massively parallel architectures;
prototypes, testbeds, or other evaluation techniques for massively threaded systems.
Other topics dealing with massive threading that are not described above also might be of interest; please contact the guest editors for further guidance.

Articles should be understandable to a broad audience of computing science and engineering professionals. The writing should be practical and original, avoiding a focus on theory, mathematics, jargon, and abstract concepts.

Accepted papers will be professionally edited for content and style. All manuscripts are subject to peer review on both technical merit and relevance to Computer's readership.

The guest editors for this special issue are Steve Keckler of Nvidia Research and the University of Texas at Austin and Steve Reinhardt of AMD Research.

Articles are due by 15 February 2012. For author guidelines and information on how to submit a manuscript electronically, visit www.computer.org/portal/web/peerreviewmagazines/computer.

http://s2012.siggraph.org/submitters/technical-papers

************************************************************************
3rd Workshop on SoCs, Heterogeneous Architectures and Workloads (SHAW-3)
Feb 25th 2012, New Orleans, Louisiana, USA
Held in conjunction with HPCA-18
http://www.ece.lsu.edu/hpca-18/shaw-3/
************************************************************************
Organizing Chairs:
------------------
Ravi Iyer Intel Labs ravishankar.iyer@intel.com
Ramesh Illikkal Intel Labs ramesh.g.illikkal@intel.com
Raj Yavatkar Intel raj.yavatkar@intel.com
Overview
--------
Computing platforms are getting smaller (e.g. handheld devices),
richer (e.g. visual computing applications) and broader (i.e. reaching
the masses via smartphones and tablets for example). This trend is
made possible by System-on-Chip (SoC) and heterogeneous architectures
that combine wider power/performance scaling, combinations of high
performance and ultra-low power general-purpose cores along with a
wide spectrum of domain-specific accelerators or Intellectual Property
(IP) blocks. With the recent introduction of general-purpose compute
cores such as Intel Core and Atom processors, these platforms have the
potential to run a much broader range of applications than ever before.
The goal of this workshop is to bring together academic researchers
and industry practitioners to discuss future SoC and Heterogeneous
architectures, Accelerators and workloads. The research challenges in
SoC/Heterogeneous platforms are multi-fold: (a) providing rich functionality
and wider power/performance range (b) attempting to cover a broad range of
applications that can be migrated from mainstream platforms to SoCs
and Heterogeneous devices, (c) enabling a modular architecture and
design environment that improves time-to-market and (d) providing a
rich software programming environment that eases the challenge of
developing applications on a heterogeneous architecture consisting of
general-purpose cores as well as specialized accelerators.
Below is the proposed list of topics for the workshop. Topics
include, but are not restricted to, the following:
• Novel SoC/Hetero Architectures
- SoCs, CPU/GPU, CPU/GPGPU architectures
- Different levels of Heterogeneity (asymmetry, specialization, etc)
- Heterogeneity in Cores, Frequency, Cache, Memory
- Power, Performance, Energy optimizations
- Adaptive heterogeneity
- Ultra-Low Power Core Micro-architectures
- Fabrics / Network-on-chip
- Cache/Memory Hierarchies
- HW Support for Heterogeneity
- HW Support for Programmability
- HW Support for Modularity
- Simulation / Emulation Methodologies
• Emerging Workloads and Embedded Devices
- New Workloads (e.g. Visual computing examples such as
Augmented Reality, Multi-modal interfaces, etc)
- Emerging embedded applications, devices and novel uses cases
- Workload Analysis for power/performance/energy
optimization and acceleration
- Workload Partitioning between Heterogeneous Cores
and Accelerators
- Performance Monitoring and Simulation
- Case Studies of SoC/Heterogeneous applications
• Novel Accelerator Designs
- Specialized Accelerator Architectures and Designs
- Domain-Specific Programmable/Configurable Accelerators
- Accelerator Interfaces for Programmability
- Development Environments for Accelerator Design
- System-Level integration of Accelerators
- Reconfigurable Logic and FPGA accelerators
Submission Guidelines:
---------------------
Interested authors are encouraged to submit extended abstracts (2
pages) or short papers (6 pages) by email to the organizing chairs
(Ravi Iyer, Ramesh Illikkal and Raj Yavatkar). The deadline for
submission is Dec 09th (by midnight in US PST zone). Final (short)
version of papers will be due on Jan 27th 2012 and will be printed
in a workshop proceedings made available to the workshop attendees.
Note: Best papers from SHAW-3 will be also considered for subsequent
publication in IEEE Computer Architecture Letters. More information on
this will be available later.
Important Dates:
----------------
Abstract / Paper Submission Dec 09th 2011
Author Notification Jan 09th 2012
Final Paper Submission Jan 27th 2012
Workshop Feb 25th 2012

Fifth International Workshop on Parallel Programming Models
and Systems Software for High-end Computing (P2S2)
Sept. 10th, 2012

To be held in conjunction with ICPP-2012: The 41st International
Conference on Parallel Processing, Sept. 10-13, 2012, Pittsburgh, USA

Website: http://www.mcs.anl.gov/events/workshops/p2s2/2012/

SCOPE
-----
The goal of this workshop is to bring together researchers and
practitioners in parallel programming models and systems software for
high-end computing systems. Please join us in a discussion of new ideas,
experiences, and the latest trends in these areas at the workshop.

TOPICS OF INTEREST
------------------
The focus areas for this workshop include, but are not limited to:

* Systems software for high-end scientific and enterprise computing
architectures
o Communication sub-subsystems for high-end computing
o High-performance file and storage systems
o Fault-tolerance techniques and implementations
o Efficient and high-performance virtualization and other
management
mechanisms for high-end computing

* Programming models and their high-performance implementations
o MPI, Sockets, OpenMP, Global Arrays, X10, UPC, Chapel,
Fortress and others
o Hybrid Programming Models

* Tools for Management, Maintenance, Coordination and Synchronization
o Software for Enterprise Data-centers using Modern Architectures
o Job scheduling libraries
o Management libraries for large-scale system
o Toolkits for process and task coordination on modern platforms

* Performance evaluation, analysis and modeling of emerging computing
platforms

PROCEEDINGS
-----------
Proceedings of this workshop will be published in CD format and will be
available
at the conference (together with the ICPP conference proceedings).
The accepted papers will be included in and indexed by the IEEE digital
library.

JOURNAL SPECIAL ISSUE
---------------------
The best papers of P2S2-2012 will be included in a Special Issue on
Parallel Programming Models and Systems Software of the Parallel Computing
(ParCo), edited by Yong Chen, Pavan Balaji, and Abhinav Vishnu.

This special issue is dedicated for the papers accepted in the P2S2
workshop. The submission to this special issue is by invitation only, and
the submission deadline is August 17th, 2012.

SUBMISSION INSTRUCTIONS
-----------------------
Submissions should be in PDF format in U.S. Letter size paper. They
should not exceed 10 pages (all inclusive). Submissions will be judged
based on relevance, significance, originality, correctness and clarity.
Please visit workshop website at:
http://www.mcs.anl.gov/events/workshops/p2s2/
for the submission link.

IMPORTANT DATES
---------------
Paper Submission: March 16th, 2012
Author Notification: June 8th, 2012
Camera Ready: July 8th, 2012
Workshop Date: Sept 10th, 2012

PROGRAM CHAIRS
--------------
* Pavan Balaji, Argonne National Laboratory
* Abhinav Vishnu, Pacific Northwest National Laboratory
* Yong Chen, Texas Tech University

PUBLICITY CHAIR
---------------
* Qichang Liang, University of Otago

STEERING COMMITTEE
------------------
* William D. Gropp, University of Illinois Urbana-Champaign
* Vijay Saraswat, IBM Research

PROGRAM COMMITTEE
-----------------
* Ahmad Afsahi, Queen's University
* George Almasi, IBM Research
* Taisuke Boku, Tsukuba University
* Darius Buntinas, Argonne National Laboratory
* Surendra Byna, Lawrence Berkeley National Lab
* Ron Brightwell, Sandia National Laboratory
* Bronis de Supinski, Lawrence Livermore National Lab
* Zhihui Du, Tsinghua University, China
* Paul Hargrove, Lawrence Berkeley National Lab
* Torsten Hoefler, Univ. of Illinois at Urbana-Champaign
* Zhiyi Huang, University of Otago, New Zealand
* Hai Jin, Huazhong Univ. of Sci. and Tech., China
* Darren J. Kerbyson, Pacific Northwest National Lab
* Zhiling Lan, Illinois Institute of Technology
* Doug Lea, State University of New York at Oswego
* Heshan Lin, Virginia Tech
* Scott Pakin, Los Alamos National Laboratory
* Sonia Sachs, Department of Energy
* Guangming Tan, Chinese Academy of Sciences
* Gabriel Tanase, IBM Research
* Rajeev Thakur, Argonne National Laboratory
* Vinod Tipparaju, Advanced Micro Devices (AMD)
* Jesper Traff, University of Vienna, Austria
* Yunquan Zhang, Chinese Academy of Sciences

If you have any questions, please contact us at p2s2-chairs@mcs.anl.gov

/* I am on the PC for this conference. --JDO */

2012 International Conference on Parallel Processing (ICPP-2012)
http://www.icpp2012.org
Pittsburgh, PA, USA
September 10-13, 2012

Sponsored by
The International Association for Computers and Communications (IACC)
In cooperation with
The University of Pittsburgh, USA

Scope

The International Conference on Parallel Processing (ICPP) provides a forum for engineers and scientists in academia, industry and government to present their latest research findings in all aspects of parallel and distributed computing. ICPP 2012 will be focused on 3 crosscutting themes: (1) Disruptive Technologies (Multicore/Manycore, Accelerators, Clouds), (2) Data-Intensive Competing and (3) Green Computing. The meeting will be organized around the following tracks:
- Architecture
- Networking and Communication
- Algorithm Design and Parallelism
- Performance Modeling and Evaluation
- Programming Models, Languages & Environments - Compilers and Run-Time Systems - Applications Paper Submission

Paper submissions should be formatted according to the IEEE standard
double-column format with a font size 10 pt or larger. Each paper is
strictly limited to 10 pages in length. Submissions should represent
original, substantive research results. We will not accept any paper
which, at the time of submission, is under review for or has already
been published (or accepted) for publication in another conference or
journal venue. See the conference website for electronic paper
submission instructions.

Conference Timeline
- Paper Submission Deadline March 02, 2012 - Author Notification June 01, 2012
- Final Manuscript Due July 06, 2012

Workshops with more narrowly focused scope will be held from September 10th to 13th. Proposals should be submitted to the Workshops Co-Chairs, Pavan Balaji
(balaji@mcs.anl.gov) and Heshan Lin (hlin2@vt.edu) by November 1, 2011.
Proceedings of the conference and workshops will be published in CD format and will be available at the conference.

For Further Information please contact:
Manish Parashar, Rutgers University, parashar@rutgers.edu

        26th International Conference on Supercomputing
                                25-29 June
2012
                      San Servolo Conference Center
                      San Servolo Island, Venice, Italy

ICS is the premier international forum for the presentation of research results in high-performance computing systems. In 2012, the conference will be held at the San Servolo Conference Center in Venice, Italy.

Papers are solicited on all aspects of research, development, and application of high-performance experimental and commercial systems, from terascale to exascale.  Areas of interest
include:

•       Computationally challenging scientific and commercial applications
   •       Models of computation and programming

•       Computer architecture and hardware organization
 
•       System software
 
•       Power efficiency and reliability
 
•       Large scale installations for internet, data centers, and cloud computing

•       Theoretical foundations of all aspects relevant to supercomputing.

Papers should not exceed 12 pages in the ACM format.

Workshop and tutorial proposals are also solicited. For further information and future updates, refer to the ICS'12 web site at http://www.ics-conference.org/archive/ics12/ Important Dates
- Abstract submission                            January  8, 2012
- Paper submission                                January 15, 2012
- Workshop and Tutorial Proposals       January 22, 2012

Regards,
Arun Kejariwal (Netflix)
Kazuki Joe (Nara Women's University, Japan)
Ben Juurlink (TU Berlin)

Fifth Workshop on General Purpose Processing Using GPUs
Held with ASPLOS XVII
London, UK
March 3, 2012
http://www.ece.neu.edu/GPGPU/GPGPU5

Overview: The goal of this workshop is to provide a forum to
discuss new and emerging general-purpose purpose programming
environments and platforms, as well as evaluate applications
that have been able to harness the horsepower provided by these
platforms. This year's work is particularly interested on new
heterogeneous GPU platforms. Papers are being sought on many
aspects of GPUs, including (but not limited to):

+ GPU applications + GPU compilation
+ GPU programming environments + GPU power/efficiency
+ GPU architectures + GPU benchmarking/measurements
+ Multi-GPU systems + Heterogeneous GPU platforms

Submission Information

Authors should submit their papers using the ACM SIG Proceedings format in
double-column style using the directions on the conference website
atwww.ece.neu.edu/GPGPU/GPGPU5

Submitted papers will be evaluated based on originality, significance
to topics, technical soundness, and presentation quality. At least
one author must register and attend GPGPU to present the work. Accepted
papers will be included in preliminary proceedings and distributed
at the event. All papers will be made available at the workshop and
will also be published in the ACM Conference Proceedings Series.

Extended versions of the best papers will be invited to be published in
a special issue of the IJPP journal.

Important Dates:
----------------
Paper submission: December 20, 2011
Author notification: January 20, 2012
Final paper: January 30, 2012

Organizers:
John Cavazos, University of Delaware
David Kaeli, Northeastern University

Program Committee:
Tarek Abdelrahman, Toronto
Emmanuel Agu, WPI
Martin Burtscher, Texas State
John Cavazos, U Delaware
Jason Choy, JP Morgan Chase
Albert Cohen, INRIA
Michael Gschwind, IBM
Lee Howes, AMD
Byunghyun Jang, AMD
Richard Johnson, NVIDIA
David Jones, Imperial College
David Kaeli, Northeastern
Volodymyr Kindratenko, UIUC
Jaejin Lee, Seoul National University
Anton Lokhmotov, ARM
Avi Mendelson, Microsoft Israel
Vincent Natoli, Stoneridge
Nacho Navarro, UPC Barcelona
Nicholas Pinto, Harvard/MIT
Hridesh Rajan, Iowa State
Norman Rubin, AMD
Markus Schordan, UAS Technikum Wien
Xipeng Shen, William& Mary
Sudharkar Yalamanchili, Georgia Tech